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[REBASE & FF] Refactor Early Cpu Init - #1915

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os-d merged 5 commits into
OpenDevicePartnership:mainfrom
os-d:virtual_wire_mode
Oct 27, 2026
Merged

os-d merged 5 commits into
OpenDevicePartnership:mainfrom
os-d:virtual_wire_mode

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@os-d

@os-d os-d commented Oct 23, 2026 •

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Description

This PR does some refactoring to early CPU init, particularly on x64 and as it relates to confidential compute guests.

DxeCore: Move Platform Exception Handler Registration Inside Arch Layer

This moves the registration of the platform exception handlers inside the architecture specific layer so that the arch can do additional actions afterwards, as will be done in future commits.

Remove confidential_compute Feature and Detect Instead

This removes the confidential_compute feature in favor of detecting the env when possible (only after platform exception handlers are enabled) and converging on a CC guest supported path when required.

This adds the logic to detect a TDX guest, the only currently supported CC guest and moves the aliased mapping protocol installation to be gated on that. Logging between GDT install and IDT install is now required to be disabled always, because we cannot check if this is a cc guest until the platform exception handlers have been installed.

The docs are updated and because the platform exception handler is the most important integration piece, it is moved to the top of the section.

This is not considered a breaking change because CC platforms have not adopted this yet for production scenarios as the feature is still being developed.

X64: Program APIC Virtual Wire Mode On CPU Init

X64 UEFI systems rely on APIC virtual wire mode being programmed during execution, e.g. wiring up legacy interrupts to the APIC to service them. Without this, interrupts can not be serviced.

Patina has relied on pre-DXE to enable this mode or MpDxe from patina-edk2 to do so. However, MpDxe has been removed in favor of MpServices. A platform that does not set virtual wire mode pre-DXE can fail to boot.

This PR adds setting virtual wire mode for all X64 platforms, so long as the MSR for determining which APIC mode the platform supports is supported (as it has long been). The MSR is then used to determine whether this is an XAPIC or X2APIC and programs it accordingly.

X64: Make GDT and IDT install Atomic

The IDT and GDT are interrelated structures and we should not be executing code between installing our GDT and the new IDT.

This updates the code to install them in the same asm block instead of across Rust code.

DXE: Register Exception Handlers Before IDT/VBAR Install

Currently, the IDT and VBAR get installed and then we register core/platform exception handlers. However, this leaves a gap where we don't have exception handlers programmed, which causes a problem on confidential compute guests that generate virtualization exceptions early and often, including through logging.

We have handled this currently by disabling logging from GDT install through to installing the platform exception handlers.

This commit makes this more graceful and installs the core and platform exception handlers before installing the IDT/VBAR so that there is no coverage gap. The logging disable is then dropped.

  • Impacts functionality?
  • Impacts security?
  • Breaking change?
  • Includes tests?
  • Includes documentation?

How This Was Tested

Tested on Hyper-V guest FW where removing MpDxe in favor of MP services caused a hang. Adding this booted to the OS again. Tested on a physical Intel device as well booting to the OS. Tested on an enlightened TDX Hyper-V guest. Tested on Q35 and ArmVirt.

Both platforms are X2APIC code; the XAPIC code is untested but the logic is copied from edk2 handling of XAPICs.

Integration Instructions

N/A.

@patina-automation

patina-automation Bot commented Oct 23, 2026 •

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✅ QEMU Validation Passed

All QEMU validation jobs completed successfully.

Note: Q35 is only built on Windows hosts (QEMU boot is disabled due to a QEMU vfat issue).

Workflow run: https://github.com/OpenDevicePartnership/patina/actions/runs/40583220961

Boot Time to EFI Shell

Platform Elapsed
ArmVirt (Linux Host) 30.9s
Q35 (Linux Host) 42.9s

Dependencies

Repository Ref
patina 9b0bd62
patina-dxe-core-qemu 1295159
patina-fw-patcher 9b100b3
patina-qemu firmware v4.1.3
patina-qemu build script 05d359d

Binary Size Report

Platform Commit Δ Debug Δ Release Δ Debug
(LZMA)
Δ Release
(LZMA)
Q35 (x86_64) Base:3852340
PR:9b0bd62
 
1.22 MB
1.23 MB
Δ +11.00 KB
974.00 KB
976.00 KB
Δ +2.00 KB
469.89 KB
473.06 KB
Δ +3.18 KB
382.91 KB
383.50 KB
Δ +609.00 B
ArmVirt (aarch64) Base:3852340
PR:9b0bd62
 
1.12 MB
1.11 MB
Δ -10.00 KB
883.50 KB
884.00 KB
Δ +512.00 B
384.75 KB
383.27 KB
Δ -1.48 KB
313.33 KB
313.33 KB
Δ -1.00 B

Compressed sizes use LZMA-alone format at preset 6 (xz --format=lzma -6).

Shared QEMU integration: 1295159.

This comment was automatically generated by the Patina QEMU PR Validation Post workflow.

@cfernald cfernald left a comment

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Looks good. Once the supervisor is merged we should do the cpu reefactor and merge this apic.rs with the one from mp, but not for this PR to avoid churn that affects that PR.

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codecov Bot commented Oct 23, 2026 •

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Codecov Report

✅ All modified and coverable lines are covered by tests.

📢 Thoughts on this report? Let us know!

@os-d
os-d force-pushed the virtual_wire_mode branch from d76fbb0 to fbe2d91 Compare October 27, 2026 18:08
@os-d os-d changed the title X64: Program APIC Virtual Wire Mode On CPU Init [REBASE & FF] Refactor Early Cpu Init Oct 27, 2026
@os-d
os-d force-pushed the virtual_wire_mode branch from fbe2d91 to e8cca58 Compare October 27, 2026 18:16
@os-d

os-d commented Oct 27, 2026

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@cfernald @vineelko @makubacki I have significantly updated this PR, please re-review

@cfernald
cfernald self-requested a review October 27, 2026 18:22
@os-d
os-d force-pushed the virtual_wire_mode branch from e8cca58 to d6e9b73 Compare October 27, 2026 18:29
Comment thread sdk/patina/src/arch.rs Resolved
Comment thread core/patina_internal_cpu/src/gdt.rs Resolved
os-d added 2 commits October 27, 2026 13:11
This moves the registration of the platform exception handlers inside
the architecture specific layer so that the arch can do additional
actions afterwards, as will be done in future commits.

Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
This removes the confidential_compute feature in favor
of detecting the env when possible (only after platform
exception handlers are enabled) and converging on
a CC guest supported path when required.

This adds the logic to detect a TDX guest, the only
currently supported CC guest and moves the aliased mapping
protocol installation to be gated on that. Logging between
GDT install and IDT install is now required to be disabled
always, because we cannot check if this is a cc guest until
the platform exception handlers have been installed.

The docs are updated and because the platform exception handler
is the most important integration piece, it is moved to the
top of the section.

This is not considered a breaking change because CC platforms have
not adopted this yet for production scenarios as the feature is
still being developed.

Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
@os-d
os-d force-pushed the virtual_wire_mode branch from d6e9b73 to d943bdd Compare October 27, 2026 20:16
os-d added 3 commits October 27, 2026 13:49
X64 UEFI systems rely on APIC virtual wire mode being
programmed during execution, e.g. wiring up legacy
interrupts to the APIC to service them. Without this,
interrupts can not be serviced.

Patina has relied on pre-DXE to enable this mode or
MpDxe from patina-edk2 to do so. However, MpDxe has
been removed in favor of MpServices. A platform that
does not set virtual wire mode pre-DXE can fail to
boot.

This PR adds setting virtual wire mode for all X64
platforms, so long as the MSR for determining which
APIC mode the platform supports is supported (as it
has long been). The MSR is then used to determine whether
this is an XAPIC or X2APIC and programs it accordingly.

Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
The IDT and GDT are interrelated structures and we should
not be executing code between installing our GDT and the
new IDT.

This updates the code to install them in the same asm block
instead of across Rust code.

Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
Currently, the IDT and VBAR get installed and then we
register core/platform exception handlers. However,
this leaves a gap where we don't have exception handlers
programmed, which causes a problem on confidential compute
guests that generate virtualization exceptions early and
often, including through logging.

We have handled this currently by disabling logging from
GDT install through to installing the platform exception
handlers.

This commit makes this more graceful and installs the
core and platform exception handlers before installing
the IDT/VBAR so that there is no coverage gap. The
logging disable is then dropped.

Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
@os-d
os-d force-pushed the virtual_wire_mode branch from d943bdd to 9b0bd62 Compare October 27, 2026 20:49
@os-d
os-d enabled auto-merge (rebase) October 27, 2026 20:49
@os-d os-d added the semver:minor Pull requests that should increment the release minor version label Oct 27, 2026
@os-d
os-d merged commit 0dcdeac into OpenDevicePartnership:main Oct 27, 2026
11 checks passed
@os-d
os-d deleted the virtual_wire_mode branch October 27, 2026 21:25
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5 participants